Dynamic System Reconfiguration in Heterogeneous Platforms (eBook)

Preface 6
Acknowledgments 16
Contents 17
Contributors 20
Introduction to MORPHEUS 24
Introduction 25
A Heterogeneous Dynamically Reconfigurable SoC 25
State of the Art 34
SoA of Reconfigurable Computing Architectures and Tools 34
The MORPHEUS Architecture 49
MORPHEUS Architecture Overview 50
Flexeos Embedded FPGA Solution 57
Logic Reconfigurability on Silicon 57
The Dream Digital Signal Processor 66
Architecture, Programming Model and Application Mapping 66
XPP-III 79
The XPP-III Reconfigurable Processor Core 79
The Hardware Services 93
The MORPHEUS Data Communication and Storage Infrastructure 108
The Integrated Tool Chain 121
Overall MORPHEUS Toolset Flow 122
The Molen Organisation and Programming Paradigm 131
Control of Dynamic Reconfiguration 140
Specification Tools for Spatial Design 149
Front-Ends for High Level Synthesis of Accelerated Operations 149
Spatial Design 175
High Level Synthesis 175
The Applications 193
Real-Time Digital Film Processing 194
Mapping of a Film Grain Noise Reduction Algorithm to the MORPHEUS Platform 194
Ethernet Based In-Service Reconfiguration of SoCs in Telecommunication Networks 203
Homeland Security – Image Processing for Intelligent Cameras 212
PHY-Layer of 802.16 Mobile Wireless on a Hardware Accelerated SoC 223
Concluding Section 231
Conclusions 232
MORPHEUS Reconfigurable Platform – Results and Perspectives 232
Training 238
Dissemination of MORPHEUS Results 255
Spreading the Knowledge Developed in the Project 255
Exploitation from the MORPHEUS Project 264
Perspectives of Exploitation About the Project Results 264
Project Management 270
List of Acronyms 276
Index 279