Functional Design Errors in Digital Circuits - Kai-hui Chang, Igor L. Markov, Valeria Bertacco

Functional Design Errors in Digital Circuits

Diagnosis Correction and Repair
Buch | Softcover
200 Seiten
2010 | Softcover reprint of hardcover 1st ed. 2009
Springer (Verlag)
978-90-481-8112-4 (ISBN)
160,49 inkl. MwSt
Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. (2) an RTL error diagnosis method that identifies the root cause of errors directly;
Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices.

Winner of the EDAA (European Design Automation Association) Outstanding Monograph Award in the Verification section. Co-authors Bertacco and Markov are existing Springer authors

Background and Prior Art.- Current Landscape in Design and Verification.- Finding Bugs and Repairing Circuits.- FogClear Methodologies and Theoretical Advances in Error Repair.- Circuit Design and Verification Methodologies.- Counterexample-Guided Error-Repair Framework.- Signature-Based Resynthesis Techniques.- Symmetry-Based Rewiring.- FogClear Components.- Bug Trace Minimization.- Functional Error Diagnosis and Correction.- Incremental Verification for Physical Synthesis.- Post-Silicon Debugging and Layout Repair.- Methodologies for Spare-Cell Insertion.- Conclusions.

Erscheint lt. Verlag 28.10.2010
Reihe/Serie Lecture Notes in Electrical Engineering ; 32
Zusatzinfo XXIV, 200 p.
Verlagsort Dordrecht
Sprache englisch
Maße 155 x 235 mm
Themenwelt Mathematik / Informatik Informatik Theorie / Studium
Informatik Weitere Themen CAD-Programme
Technik Elektrotechnik / Energietechnik
ISBN-10 90-481-8112-7 / 9048181127
ISBN-13 978-90-481-8112-4 / 9789048181124
Zustand Neuware
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