Verification and Validation in Systems Engineering

Assessing UML/SysML Design Models
Buch | Hardcover
XXVI, 248 Seiten
2010 | 2010
Springer Berlin (Verlag)
978-3-642-15227-6 (ISBN)
139,09 inkl. MwSt
At the dawn of the 21st century and the information age, communication and c- puting power are becoming ever increasingly available, virtually pervading almost every aspect of modern socio-economical interactions. Consequently, the potential for realizing a signi?cantly greater number of technology-mediated activities has emerged. Indeed, many of our modern activity ?elds are heavily dependant upon various underlying systems and software-intensive platforms. Such technologies are commonly used in everyday activities such as commuting, traf?c control and m- agement, mobile computing, navigation, mobile communication. Thus, the correct function of the forenamed computing systems becomes a major concern. This is all the more important since, in spite of the numerous updates, patches and ?rmware revisions being constantly issued, newly discovered logical bugs in a wide range of modern software platforms (e. g. , operating systems) and software-intensive systems (e. g. , embedded systems) are just as frequently being reported. In addition, many of today's products and services are presently being deployed in a highly competitive environment wherein a product or service is succeeding in most of the cases thanks to its quality to price ratio for a given set of features. Accordingly, a number of critical aspects have to be considered, such as the ab- ity to pack as many features as needed in a given product or service while c- currently maintaining high quality, reasonable price, and short time -to- market.

Architecture Frameworks, Model-Driven Architecture, and Simulation.- Unified Modeling Language.- Systems Modeling Language.- Verification, Validation, and Accreditation.- Automatic Approach for Synergistic Verification and Validation.- Software Engineering Metrics in the Context of Systems Engineering.- Verification and Validation of UML Behavioral Diagrams.- Probabilistic Model Checking of SysML Activity Diagrams.- Performance Analysis of Time-Constrained SysML Activity Diagrams.- Semantic Foundations of SysML Activity Diagrams.- Soundness of the Translation Algorithm.- Conclusion.

From the reviews:

"The five authors of this book tackle a very difficult subject, and must be commended for doing so. The result is a welcome addition to the body of professional literature. ... It is a highly technical ... book on one of the most critical subjects that we have, as professionals. ... The book is exceedingly well illustrated. ... a professional involved in systems engineering, and particularly in systems quality, verification, systems verification, or other related activities, would find this book useful." (Mordechai Ben-Menachem, ACM Computing Reviews, May, 2011)

Erscheint lt. Verlag 18.11.2010
Zusatzinfo XXVI, 248 p.
Verlagsort Berlin
Sprache englisch
Maße 155 x 235 mm
Gewicht 579 g
Themenwelt Mathematik / Informatik Informatik Software Entwicklung
Mathematik / Informatik Informatik Theorie / Studium
Mathematik / Informatik Mathematik Finanz- / Wirtschaftsmathematik
Schlagworte algorithms • Model Checking • Performance • Performance Analysis • program analysis • Software engineering • software metrics • Software Validation • Software Verification • SysML • System • Text • UML
ISBN-10 3-642-15227-9 / 3642152279
ISBN-13 978-3-642-15227-6 / 9783642152276
Zustand Neuware
Haben Sie eine Frage zum Produkt?
Mehr entdecken
aus dem Bereich