Holistic Approaches for Power Generation, Linearization, and Radiation in CMOS

Ali Hajimiri and Kaushik Dasgupta,    California Institute of Technology (Caltech), Pasadena, CA

Keywords

Wireless; communications; technologies

The field of wireless communications has experienced an exponential growth over the past four decades, going from the realm of science fiction to becoming so ubiquitous and natural that the younger generations have a difficult time imagining a world without it. This has been made possible through many breakthroughs in our understanding of the nature of wireless communications and, more importantly, numerous innovative enabling technologies that have made personal wireless communication an everyday reality.

Creating the fascinating edifice that is the connected world of ubiquitous access to information has been made possible through effective complexity management performed through a process of divide and conquer. This is possible through a systematic process of specialization and subspecialization in electrical engineering and its associated fields that have been part of the historic trends in this area, creating levels of abstractions within which a small group of people can design for a given set of specifications. This is what has enabled this complexity management. These levels of abstraction have played a key role in our ability to deploy such complex systems such as our wireless communication systems. A typical example of the hierarchy of these levels of abstractions is shown in Figure 1.1.

In radiofrequency integrated circuit (RFIC) design, the same trends have been present since the inception of RFIC and monolithic microwave integrated circuits (MMICs). The system architectures are defined and created at a separate time and by a different group of engineers than those who define the chip architectures and those who design the transistor levels circuit blocks. The electromagnetic design (e.g., antenna and off-chip passive components) has also been generally performed by yet another group of designers. This partitioning of tasks has enabled speedy and tractable design of such systems; however, it has also created impediments in the way of innovation by limiting the number of possibilities that can be considered in the design of the entire system by constraining the design space to a limited subset of all possibilities (Figure 1.2).

These somewhat arbitrary levels of abstractions have resulted in some of the classical approaches to RFIC design, with the individual circuit elements considered as lumped components and the effects of nonidealities and the couplings modeled using additional parasitic components. This allows for continuous application of long-known circuit simulation techniques essentially based on nodal analysis (Figure 1.3). Even in the realm of MMIC, the approach has been only partially extended by analyzing the nonlumped blocks such as transmission lines and on-chip antennas as separate units and representing them as scatter parameter boxes (Figure 1.4).

However, the ever-increasing complexity of wireless systems and the associated integrated circuits combined with the constantly growing standards and frequency bands of operations have created strong interconnections among these levels of abstractions. This is a challenge if examined from the point of view of classical levels of abstractions. It manifests itself as a cohort of problems such as cross talk, electromagnetic coupling, impedance mismatches, parasitic elements, and others. This situation has been exacerbated by the scaling of the transistors; the cutoff wavelength (the wavelength associated with the cutoff frequency of the transistors) is constantly shrinking and the dimensions of the integrated circuits have been growing, as conceptually shown in Figure 1.5. This has resulted in a crossing of the two curves (which happens approximately at the 250-nm CMOS nodes), leaving us in a nonlumped regime.

However, if one is willing to look at the problem in a broader context and not be confined by the classical levels of abstraction, then this can present a tremendous opportunity to overcome some of the classical problems in RFIC design. This can be accomplished by using a holistic approach to co-design of various parts of the system [1,2]. The holistic approach relies on a more close interaction of the electromagnetics and the transistors. It generally achieves this through a large number of transistors and small passive structures with strong electromagnetic coupling operating in concert (Figure 1.6).

These structures can be used to enable simultaneous and active control of the electric and magnetic field profiles (E and H), enabling a much richer combination of field profiles and a much broader set of functions. This is an example of holistic integration of architecture, circuits, electromagnetics, and devices.

Although promising, such holistic approaches require the designers to obtain a broader set of skills ranging from a more thorough understanding of the system level matters to deeper device and physics-oriented aspects of the system. However, once the walls between classical levels of abstraction are removed, it becomes possible to design circuits that can outperform the classical solutions. More sophisticated approaches to simulation of these systems, which necessitate rethinking of the whole design flow, are also necessary.

A holistic approach inevitably leads to several underlying trends in the design methodology. Some of those trends are:

We discuss these themes through a few examples in the remainder of this chapter.

1.1 Self-Healing Integrated Circuits

The past few decades have witnessed aggressive CMOS scaling, primarily driven by the demand for cost-, area-, and power-efficient processors for desktops as well as mobile chipsets. The number of transistors per chip has increased from a few thousand in the 1980s to a few billion in the latest desktop processors. More recently, pure dimensional scaling has become less effective and other performance enhancement techniques like strained Si [3,4], tri-gate [5] FinFETs, and others have been widely adopted by the semiconductor industry. While bringing significant improvements in power consumption, area, and overall performance, such scaling also comes at the cost of increased variations—both between chips and on the same chip. We can broadly categorize these variations into static variations and dynamic variations. Static variations can mostly be attributed to the fabrication process itself and is dominated by two major effects—random dopant fluctuations (RDFs) and line edge roughness (LER).

As shown in Figure 1.7A, the average number of dopant atoms in the channel region has scaled down dramatically, from a few hundred in 130-nm CMOS to less than one hundred in modern CMOS transistors. Any variation in both the number and the actual placement of these dopants (RDF) thereby leads to significant changes in the transistor performance. LER is caused by imperfections during the...