Hardware Security (eBook)
XXI, 525 Seiten
Springer Nature Switzerland (Verlag)
978-3-031-58687-3 (ISBN)
This book provides a look into the future of hardware and microelectronics security, with an emphasis on potential directions in security-aware design, security verification and validation, building trusted execution environments, and physical assurance. The book emphasizes some critical questions that must be answered in the domain of hardware and microelectronics security in the next 5-10 years: (i) The notion of security must be migrated from IP-level to system-level; (ii) What would be the future of IP and IC protection against emerging threats; (iii) How security solutions could be migrated/expanded from SoC-level to SiP-level; (iv) the advances in power side-channel analysis with emphasis on post-quantum cryptography algorithms; (v) how to enable digital twin for secure semiconductor lifecycle management; and (vi) how physical assurance will look like with considerations of emerging technologies. The main aim of this book is to serve as a comprehensive and concise roadmap for new learners and educators navigating the evolving research directions in the domain of hardware and microelectronic securities. Overall, throughout 11 chapters, the book provides numerous frameworks, countermeasures, security evaluations, and roadmaps for the future of hardware security.
Mark Tehranipoor is currently the Sachio Semmoto Chair of the Department of Electrical and Computer Engineering (ECE) and the Intel Charles E. Young Preeminence Endowed Chair Professor in Cybersecurity at the the University of Florida. His current research projects include hardware security and trust, electronics supply chain security, IoT security, and reliable and testable VLSI design. He has published numerous journal articles and refereed conference papers and has given 230+ invited talks and keynote addresses. In addition, he has 22 patents issued, 28 pending invention disclosures, and has published 16 books of which two are textbooks. His projects have been sponsored by 50+ companies and Government agencies. He has also served as Program Chair of several IEEE/ACM sponsored conferences and workshops (HOST, ITC, DFT, D3T, DBT, NATW, etc.). He co-founded the IEEE International Symposium on Hardware-Oriented Security and Trust (HOST). He is a Fellow of IEEE, a Fellow of ACM, a Fellow of the National Academy of Inventors (NAI), a Golden Core Member of IEEE Computer Society, and a Member of ACM SIGDA.
Kimia Zamiri Azar is a research assistant professor in the Department of ECE at the University of Florida. She received a Ph.D. degree from the Department of ECE at George Mason University in 2021. Her research interests span hardware security and trust, supply chain security, System-on-Chips security validation and verification, and IoT security. She has one book, two book chapters, as well as 30+ publications in high-prestigious journals and conferences, including IEEE Transactions on Computers, IEEE Transactions on VLSI, IACR Transactions on Cryptographic Hardware and Embedded Systems (CHES), DAC, DATE, HOST, etc., with awards including nominations/recipient for Best Paper Award in IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2020, IEEE/ACM Conference on Computer-Aided-Design (ICCAD) 2020, IEEE HOST 2022, and DATE 2023.
Navid Asadizanjani is an associate professor in the department of electrical and computer engineering at university of Florida with an affiliation to the Materials Science and Engineering department. His research is mainly focused on. He investigates novel techniques for integrated circuits counterfeit detection/prevention, system and chip level reverse engineering, anti-reverse engineering, invasive and semi-invasive physical attacks, integrity analysis, etc.. Dr. Asadi is director of the Security and Assurance (SCAN) lab house to more than $10M advanced imaging and characterization equipment. He also serves as the associate director of the Microelectronics Security Training (MEST) center and Florida Semiconductor Institute (FSI). He has received several best paper awards and is the co-founder of IEEE-PAINE conference.
Fahim Rahman is currently a Research Assistant Professor with the Electrical and Computer Engineering Department. His research has been sponsored by SRC, AFOSR, AFRL, DARPA, Cisco, TI, and NIST. His current research interests are in the domain of hardware and cybersecurity and trust, including electronic supply-chain security, CAD for security and automatic assessment, and hardware-assisted cybersecurity. He is a member of ACM.
Hadi Mardani Kamali is an assistant professor in the Department of ECE at the University of Central Florida. He received his Ph.D. degree from the Department of Electrical and Computer Engineering at George Mason University, 2021. His research delves into hardware security with a particular focus on exploiting IP protection techniques, design-for-trust for VLSI circuits, and CAD frameworks for security (design-for-security). His research contributions include the authorship of two books, three book chapters, three issued/pending patents, and numerous publications in top journals and conferences including IEEE Transactions on Computers, IEEE Transactions on VLSI, CHES, RAID, DAC, DATE, etc., with awards including nominations/recipients of Best Paper Award in ICCAD'19, ISVLSI'20, ICCAD'20, IEEE CAS 2020, HOST 2022, and DATE 2023.
Farimah Farahmandi is currently the Yangbin Wang Rising Star Endowed Professor, an assistant professor in the Department of Electrical and Computer Engineering (ECE) and the associate director of Edaptive Computing Inc., Transition Center (ECI-TC), and Florida Institute for Cybersecurity (FICS) at the University of Florida. Her research interests include hardware security verification, formal methods, fault-injection attack analysis, side-channel leakage assessment, information leakage, secure physical design, secure supply chain of microelectronics, and post-silicon validation and debug. Her research, sponsored by NSF, SRC, DARPA, AFRL, DoD, ONR, Analog Devices, ANSYS, Synopsys, and Cisco, has resulted in 7 books, 9 book chapters, 12 issued/pending patents, and several publications in premier ACM/IEEE journals and conferences. Her research has been recognized by several awards including 2022 Semiconductor Research Corporation Young Faculty Award and the 2022 ECE Research Excellence Award at UF. She is also the recipient of four best paper nominations. She also has served on many technical program committees as well as organizing committees of premier ACM and IEEE conferences.
Erscheint lt. Verlag | 11.6.2024 |
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Zusatzinfo | XXI, 525 p. 148 illus., 133 illus. in color. |
Sprache | englisch |
Themenwelt | Mathematik / Informatik ► Informatik |
Technik ► Elektrotechnik / Energietechnik | |
Schlagworte | Digital Twin • Hardware security and trust • IP Protection in VLSI Design • Secure Physical Design • trustworthy hardware design |
ISBN-10 | 3-031-58687-5 / 3031586875 |
ISBN-13 | 978-3-031-58687-3 / 9783031586873 |
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