ULSI Semiconductor Technology Atlas
John Wiley & Sons Inc (Hersteller)
978-0-471-66879-4 (ISBN)
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Ultra Large Scale Integration (ULSI) refers to chips with more than 10,000,000 devices per chip. It is the natural outgrowth of VLSI (Very Large Scale Integration). "ULSI Semiconductor Technology Atlas" uses TEM (Transmission Electron Microscopy) micrographs to explain and illustrate ULSI process technologies and associated problems.
CHIH--HANG TUNG is a senior member of the technical staff and Project Leader at the Institute of Microelectronics in Singapore. GEORGE T. T. SHENG was the first to develop cross--sectioning samples of TEM studies of semiconductor devices and has been involved with many other groundbreaking projects at Bell Labs. CHIH--YUAN LU is Chairman and CEO of Ardentec Corp., an ULSI testing service company. He is also CTO of Macronix International Co., Ltd., the eighth largest worldwide NVM semiconductor company.
FOREWORD. PREFACE. PART I. 1. Microelectronics and Microscopy. 2. ULSI Process Technology. 3. Applications of TEM for Construction Analysis. 4. TEM Sample Preparation Techniques. PART II. 5. Ion Implantation and Substrate Defects. 6. Dielectrics and Isolation. 7. Silicides, Polycide, and Salicide. 8. Metallization and Interconnects. PART III. 9. ULSI Devices I: DRAM Cell with Planar Capacitor. 10. ULSI Devices II: DRAM Cell with Stacked Capacitor. 11. ULSI Devices III: DRAM Cell with Trench Capacitor. 12. ULSI Devices IV: SRAM. PART IV. 13. TEM in Failure Analysis. 14. Novel Devices and Materials. 15. TEM in Under Bump Metallization (UBM) and Advanced Electronics Packaging Technologies. 16. High--Resolution TEM in Microelectronics. INDEX.
Erscheint lt. Verlag | 1.2.2005 |
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Verlagsort | New York |
Sprache | englisch |
Gewicht | 10 g |
Themenwelt | Technik ► Elektrotechnik / Energietechnik |
ISBN-10 | 0-471-66879-6 / 0471668796 |
ISBN-13 | 978-0-471-66879-4 / 9780471668794 |
Zustand | Neuware |
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