Adaptive Techniques for Mixed Signal System on Chip (eBook)
XIII, 178 Seiten
Springer US (Verlag)
978-0-387-32155-4 (ISBN)
This book is devoted to the subject of adaptive techniques for smart analog and mixed signal design whereby fully functional first-pass silicon is achievable. To our knowledge, this is the first book devoted to this subject. The techniques described should lead to quantum improvement in design productivity of complex analog and mixed signal systems while significantly cutting the spiraling costs of product development in emerging nanometer technologies.
Adaptive Techniques for Mixed Signal Sytem on Chip discusses the concept of adaptation in the context of analog and mixed signal design along with different adaptive architectures used to control any system parameter. The first part of the book gives an overview of the different elements that are normally used in adaptive designs including tunable elements as well as voltage, current, and time references with an emphasis on the circuit design of specific blocks such as voltage-controlled transconductors, offset comparators, and a novel technique for accurate implementation of on chip resistors. While the first part of the book addresses adaptive techniques at the circuit and block levels, the second part discusses adaptive equalization architectures employed to minimize the impact of ISI (Intersymbol Interference) on the quality of received data in high-speed wire line transceivers. It presents the implementation of a 125Mbps transceiver operating over a variable length of Category 5 (CAT-5) Ethernet cable as an example of adaptive equalizers.
1. Introduction. 1.1 Categories of Variations in Analog and Mixed Signal ICs. 1.2 The Essence of Adaptation. 1.3 The process of Adaptation. 1.4 Book Outline. 2. Adaptive Architectures. 2.1 Automatic Tuning. 2.2 Post Fabrication Tuning. 2.3 Summary. 3. Tunable Elements. 3.1 Voltage-Controlled Transconductors. 3.2 Comparators. 3.3 Summary. 4. On Chip Resistors and Capasitors. 4.1 Passive Resistors. 4.2 Passive Capasitors. 4.3 Summary. 5. A Digital Adaptive Technique for On-Chip Resistors. 5.1 The Calibration Technique. 5.2 Practical Advantages and Limitations. 5.3 Applications. 5.4 Summary. 6. Equalization. 6.1 Intersymbol Interference. 6.2 Eye Diagrams. 6.3 Equalization Architectures. 6.4 Implementation Techniques. 6.5 Summary. 7. An Analog Adaptive Equalizer for Wire Line Transceivers. 7.1 Motivation. 7.2 Transmission Channel Modeling. 7.3 A Feed-Forward Adaptive Equalizor. 7.4 Simulation Results. 7.5 Measurements Results. 7.6 Summary. Bibliography. Index.
Erscheint lt. Verlag | 27.9.2006 |
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Reihe/Serie | The Springer International Series in Engineering and Computer Science | The Springer International Series in Engineering and Computer Science |
Zusatzinfo | XIII, 178 p. |
Verlagsort | New York |
Sprache | englisch |
Themenwelt | Mathematik / Informatik ► Informatik |
Technik ► Elektrotechnik / Energietechnik | |
Technik ► Nachrichtentechnik | |
Schlagworte | Adaptive Architectures • Analog,RF and mixed signal • CMOS • Development • Equalization • Ethernet • High-Speed Transceivers • Integrated circuit • Resistor Tuning • SoC • Symbol • System on chip • System on chip (SoC) • Transceiver • Transconductors • Wireless radio transceivers |
ISBN-10 | 0-387-32155-1 / 0387321551 |
ISBN-13 | 978-0-387-32155-4 / 9780387321554 |
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