Jitter, Noise, and Signal Integrity at High-Speed - Mike Peng Li

Jitter, Noise, and Signal Integrity at High-Speed

(Autor)

Buch | Hardcover
400 Seiten
2007
Prentice Hall (Verlag)
978-0-13-242961-0 (ISBN)
92,95 inkl. MwSt
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State-of-the-art JNB and SI Problem-Solving: Theory, Analysis, Methods, and Applications

 

Jitter, noise, and bit error (JNB) and signal integrity (SI) have become today`s greatest challenges in high-speed digital design. Now, there’s a comprehensive and up-to-date guide to overcoming these challenges, direct from Dr. Mike Peng Li, cochair of the PCI Express jitter standard committee.

 

One of the field’s most respected experts, Li has brought together the latest theory, analysis, methods, and practical applications, demonstrating how to solve difficult JNB and SI problems in both link components and complete systems. Li introduces the fundamental terminology, definitions, and concepts associated with JNB and SI, as well as their sources and root causes. He guides readers from basic math, statistics, circuit and system models all the way through final applications. Emphasizing clock and serial data communications applications, he covers JNB and SI simulation, modeling, diagnostics, debugging, compliance testing, and much more.

 

Coverage includes



JNB component classification, interrelationships, measurement references, and transfer functions
Statistical techniques and signal processing theory for quantitatively understanding and modeling JNB and related components
Jitter, noise, and BER: physical/mathematical foundations and statistical signal processing views
Jitter separation methods in statistical distribution, time, and frequency domains
Clock jitter in detail: phase, period, and cycle-to-cycle jitter, and key interrelationships among them
PLL jitter in clock generation and clock recovery
Jitter, noise, and SI mechanisms in high-speed link systems
Quantitative modeling and analysis for jitter, noise, and SI
Testing requirements and methods for links and systems
Emerging trends in high-speed JNB and SI

As data rates continue to accelerate, engineers encounter increasingly complex JNB and SI problems. In Jitter, Noise, and Signal Integrity at High-Speed, Dr. Li provides powerful new tools for solving these problems–quickly, efficiently, and reliably.

 

Preface xv

Acknowledgements xxi

About the Author xxiii

 

Chapter 1: Introduction 1

Chapter 2: Statistical Signal and Linear Theory for Jitter, Noise, and Signal Integrity 27

Chapter 3: Source, Mechanism, and Math Model for Jitter and Noise 75

Chapter 4: Jitter, Noise, BER (JNB), and Interrelationships 109

Chapter 5: Jitter and Noise Separation and Analysis in Statistical Domain 131

Chapter 6: Jitter and Noise Separation and Analysis in the Time and Frequency Domains 163

Chapter 7: Clock Jitter 185

Chapter 8: PLL Jitter and Transfer Function Analysis 209

Chapter 9: Jitter and Signal Integrity Mechanisms for High-Speed Links 253

Chapter 10: Modeling and Analysis for Jitter and Signaling Integrity for High-Speed Links 281

Chapter 11: Testing and Analysis for Jitter and Signaling Integrity for High-Speed Links 309

Chapter 12: Book Summary and Future Challenges 345

 

Index 353

 

 

Dr. Mike Peng Li was the Chief Technology Officer (CTO) with Wavecrest. He is now a Principle Architecture/Distinguished Engineer with Altera. Dr. Li pioneered the jitter separation method (Tailfit); deterministic jitter (DJ), random jitter (RJ), and total jitter (TJ) concept and theory formation; and the jitter transfer function (JTF) concept, theory, and application for high-speed serial link analysis. He has set and contributed to standards for jitter, noise, and signal integrity for leading serial data communications, such as Fibre Channel, Gigabit Ethernet, Serial ATA, PCI Express, FB DIMM, and International Technology Roadmap for Semiconductors (ITRS). He has been the cochairman of the PCI Express jitter standard committee. Dr. Li has been involved in technical committees for IEEE- and IEC-sponsored technical conferences, such as International Test Conference (ITC) and DesignCon. He is a frequent speaker, invited author/speaker, panelist, and session and panel chair on the subjects of jitter/noise and signal integrity, covering both design and testing. He has received many awards, including a design paper award from DesignCon/IEC and a contribution award from PCI-SIG. He has been listed in Who’s Who in America and Who’s Who in the World since 2006.             Dr. Li has more than 15 years of experience in high-speed-related measurement instrumentation, testing, and analysis/modeling algorithms and tools, with applications in IC, microprocessor, clock, serial data communications for electrical and optical, and wireless communication. He has a BS in physics from the University of Science and Technology in China and an MSE in electrical engineering and a PhD in physics from the University of Alabama in Huntsville. He did his post-doctorate work at the University of California, Berkeley, where he worked as a research scientist on high-energy astrophysics before he joined industry. Dr Li has published more than 80 papers in refereed technical journals and conferences. He has filed 12 patents, with four granted and eight pending. He was the executive editor for Design and Test for Multiple Gbps Communication Devices and Systems and wrote two contributing chapters on jitter, signal integrity, and high-speed I/O design and testing for two books.    

Preface xv

Acknowledgements xxi

About the Author xxiii

 

Chapter 1: Introduction 1

Chapter 2: Statistical Signal and Linear Theory for Jitter, Noise, and Signal Integrity 27

Chapter 3: Source, Mechanism, and Math Model for Jitter and Noise 75

Chapter 4: Jitter, Noise, BER (JNB), and Interrelationships 109

Chapter 5: Jitter and Noise Separation and Analysis in Statistical Domain 131

Chapter 6: Jitter and Noise Separation and Analysis in the Time and Frequency Domains 163

Chapter 7: Clock Jitter 185

Chapter 8: PLL Jitter and Transfer Function Analysis 209

Chapter 9: Jitter and Signal Integrity Mechanisms for High-Speed Links 253

Chapter 10: Modeling and Analysis for Jitter and Signaling Integrity for High-Speed Links 281

Chapter 11: Testing and Analysis for Jitter and Signaling Integrity for High-Speed Links 309

Chapter 12: Book Summary and Future Challenges 345

 

Index 353



 

 

Erscheint lt. Verlag 18.12.2007
Reihe/Serie Prentice Hall Modern Semiconductor Design Series
Verlagsort Upper Saddle River
Sprache englisch
Maße 186 x 246 mm
Gewicht 900 g
Themenwelt Mathematik / Informatik Informatik
Technik Elektrotechnik / Energietechnik
Technik Nachrichtentechnik
ISBN-10 0-13-242961-6 / 0132429616
ISBN-13 978-0-13-242961-0 / 9780132429610
Zustand Neuware
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