System Reduction for Nanoscale IC Design -

System Reduction for Nanoscale IC Design

Peter Benner (Herausgeber)

Buch | Softcover
XI, 197 Seiten
2018 | 1. Softcover reprint of the original 1st ed. 2017
Springer International Publishing (Verlag)
978-3-319-79154-8 (ISBN)
53,49 inkl. MwSt

This book describes the computational challenges posed by the progression toward nanoscale electronic devices and increasingly short design cycles in the microelectronics industry, and proposes methods of model reduction which facilitate circuit and device simulation for specific tasks in the design cycle.

The goal is to develop and compare methods for system reduction in the design of high dimensional nanoelectronic ICs, and to test these methods in the practice of semiconductor development. Six chapters describe the challenges for numerical simulation of nanoelectronic circuits and suggest model reduction methods for constituting equations. These include linear and nonlinear differential equations tailored to circuit equations and drift diffusion equations for semiconductor devices. The performance of these methods is illustrated with numerical experiments using real-world data. Readers will benefit from an up-to-date overview of the latest model reduction methods in computational nanoelectronics.

Preface.- 1 Model order reduction of integrated circuits in electrical networks: Michael Hinze, Martin Kunkel, Ulrich Matthes, and Morten Vierling.- 2 Element-based model reduction in circuit simulation: Andreas Steinbrecher and Tatjana Stykel.- 3 Reduced Representation of Power Grid Models: Peter Benner and André Schneider.- 4 Coupling of numeric/symbolic reduction methods for generating parametrized models of nanoelectronic systems: Oliver Schmidt, Matthias Hauser, and Patrick Lang.- 5 Low-Rank Cholesky Factor Krylov Subspace Methods for Generalized Projected Lyapunov Equations: Matthias Bollhöfer and André K. Eppler.- Index.

Erscheinungsdatum
Reihe/Serie Mathematics in Industry
Zusatzinfo XI, 197 p. 73 illus., 39 illus. in color.
Verlagsort Cham
Sprache englisch
Maße 155 x 235 mm
Gewicht 3285 g
Themenwelt Mathematik / Informatik Informatik
Mathematik / Informatik Mathematik Analysis
Mathematik / Informatik Mathematik Angewandte Mathematik
Schlagworte circuit simulation • computational nanoelectronics • Device simulation • Model order reduction • nanoelectronics
ISBN-10 3-319-79154-0 / 3319791540
ISBN-13 978-3-319-79154-8 / 9783319791548
Zustand Neuware
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