Principles of Verifiable RTL Design - Lionel Bening

Principles of Verifiable RTL Design

A Functional Coding Style Supporting Verification Processes in Verilog

Lionel Bening, Harry Foster (Herausgeber)

(Autor)

Buch | Hardcover
272 Seiten
2000
Kluwer Academic Publishers (Verlag)
978-0-7923-7788-7 (ISBN)
85,59 inkl. MwSt
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Explaining how you can write Verilog to describe chip designs at the RT-level in a manner that co-operates with verification processes, this text focuses on how this co-operation can return an order of magnitude improvement in performance and capacity from certain tools.
Explaining how you can write Verilog to describe chip designs at the RT-level in a manner that co-operates with verification processes, this text focuses on how this co-operation can return an order of magnitude improvement in performance and capacity from tools such as simulation and equivalence checkers. It reduces the labour costs of coverage and formal model checking by facilitating communication between the design engineer and the verification engineer. It also orients the RTL style to provide more useful results from the overall verification process.

Preface. 1. Introduction. 2. The Verification Process. 3. RTL Methodology Basics. 4. RTL Logic Simulation. 5. RTL Formal Verification. 6. Verifiable RTL Style. 7. The Bad Stuff. 8. Verifiable RTL Tutorial. 9. Principles of Verifiable RTL Design. Bibliography. A Comparing Verilog Construct Performance. B Quick Reference. Index.

Erscheint lt. Verlag 29.2.2000
Zusatzinfo bibliography, index
Sprache englisch
Themenwelt Mathematik / Informatik Informatik Programmiersprachen / -werkzeuge
Mathematik / Informatik Informatik Theorie / Studium
ISBN-10 0-7923-7788-5 / 0792377885
ISBN-13 978-0-7923-7788-7 / 9780792377887
Zustand Neuware
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