LIST OF FIGURES

1.1 Shewhart cycle

1.2 Ishikawa diagram

1.3 Examples of basic test cases

1.4 Example of a test case with a sequence of < input, expected outcome >

1.5 Subset of the input domain exercising a subset of the program behavior

1.6 Different activities in program testing

1.7 Development and testing phases in the V model

1.8 Regression testing at different software testing levels. (From ref. 41. © 2005 John Wiley & Sons.)

2.1 Executing a program with a subset of the input domain

2.2 Example of inappropriate path selection

2.3 Different ways of comparing power of test methods: (a) produces all test cases produced by another method; (b) test sets have common elements.

2.4 Context of applying test adequacy

3.1 Steps in the code review process

3.2 Dynamic unit test environment

3.3 Test-first process in XP. (From ref. 24. © 2005 IEEE.)

3.4 Sample pseudocode for performing unit testing

3.5 The assertTrue() assertion throws an exception

3.6 Example test suite

4.1 Process of generating test input data for control flow testing

4.2 Symbols in a CFG

4.3 Function to open three files

4.4 High-level CFG representation of openfiles(). The three nodes are numbered 1, 2, and 3.

4.5 Detailed CFG representation of openfiles(). The numbers 1–21 are the nodes

4.6 Function to compute average of selected integers in an array. This program is an adaptation of “Figure 2. A sample program” in ref. 10. (With permission from the Australian Computer Society.)

4.7 A CFG representation of ReturnAverage(). Numbers 1–13 are the nodes.

4.8 Dashed arrows represent the branches not covered by statement covering in Table 4.4

4.9 Partial CFG with (a) OR operation and (b) AND operations

4.10 Example of a path from Figure 4.7

4.11 Path predicate for path in Figure 4.10

4.12 Method in Java to explain symbolic substitution [11]

4.13 Path predicate expression for path in Figure 4.10

4.14 Another example of path from Figure 4.7

4.15 Path predicate expression for path shown in Figure 4.14

4.16 Input data satisfying constraints of Figure 4.13

4.17 Binary search routine

5.1 Sequence of computations showing data flow anomaly

5.2 State transition diagram of a program variable. (From ref. 2. © 1979 IEEE.)

5.3 Definition and uses of variables

5.4 Data flow graph of ReturnAverage() example

5.5 Relationship among DF (data flow) testing criteria. (From ref. 4. © 1988 IEEE.)

5.6 Relationship among FDF (feasible data flow) testing criteria. (From ref. 4. © 1988 IEEE.)

5.7 Limitation of different fault detection techniques

5.8 Binary search routine

5.9 Modified binary search routine

6.1 Illustration of the concept of program domains

6.2 A function to explain program domains

6.3 Control flow graph representation of the function in Figure 6.2

6.4 Domains obtained from interpreted predicates in Figure 6.3

6.5 Predicates defining the TT domain in Figure 6.4

6.6 ON and OFF points

6.7 Boundary shift resulting in reduced domain (closed inequality)

6.8 Boundary shift resulting in enlarged domain (closed inequality)

6.9 Tilted boundary (closed inequality)

6.10 Closure error (closed inequality)

6.11 Boundary shift resulting in reduced domain (open inequality)

6.12 Boundary shift resulting in enlarged domain (open inequality)

6.13 Tilted boundary (open inequality)

6.14 Closure error (open inequality)

6.15 Equality border

6.16 Domains D1, D2 and D3

7.1 Module hierarchy with three levels and seven modules

7.2 Top-down integration of modules A and B

7.3 Top-down integration of modules A, B, and D

7.4 Top-down integration of modules A, B, D, and C

7.5 Top-down integration of modules A, B, C, D, and E

7.6 Top-down integration of modules A, B, C, D, E, and F

7.7 Top-down integration of modules A, B, C, D, E, F and G

7.8 Bottom-up integration of modules E, F, and G

7.9 Bottom-up integration of modules B, C, and D with E, F, and G

7.10 Bottom-up integration of module A with all others

7.11 Hardware ECO process

7.12 Software ECO process

7.13 Module hierarchy of software system

8.1 Types of system tests

8.2 Types of basic tests

8.3 Types of functionality tests

8.4 Types of robustness tests

8.5 Typical 1xEV-DO radio access network. (Courtesy of Airvana, Inc.)

9.1 Frequency selection box of Bluetooth specification

9.2 Part of form ON479 of T1 general—2001, published by the CCRA

9.3 Functionally related variables

9.4 Function in context

9.5 (a) Obtaining output values from an input vector and (b) obtaining an input vector from an output value in functional testing

9.6 Functional testing in general

9.7 System S with three input variables

9.8 (a) Too many test inputs; (b) one input selected from each subdomain

9.9 Gold standard oracle

9.10 Parametric oracle

9.11 Statistical oracle

10.1 Spectrum of software systems

10.2 Data-dominated systems

10.3 Control-dominated systems

10.4 FSM model of dual-boot laptop computer

10.5 Interactions between system and its environment modeled as FSM

10.6 PCOs on a telephone

10.7 FSM model of a PBX

10.8 FSM model of PBX

10.9 Interaction of test sequence with SUT

10.10 Derived test case from transition tour

10.12 Finite-state machine G1 (From ref. 5. © 1997 IEEE.)

10.11 Conceptual model of test case with state verification

10.13 UIO tree for G1 in Figure 10.12. (From ref. 5. © 1997 IEEE.)

10.14 Identification of UIO sequences on UIO tree of Figure 10.13

10.15 Finite-state machine G2

10.16 Distinguishing sequence tree for G2 in Figure 10.15

10.17 FSM that does not possess distinguishing sequence. (From ref. 11. © 1994 IEEE.)

10.18 DS tree for FSM (Figure 10.17)

10.19 Abstraction of N-entity in OSI reference architecture

10.20 Abstract local test architecture

10.21 Abstract external test architecture

10.22 Local architecture

10.23 Distributed architecture

10.24 Coordinated architecture

10.25 Remote architecture

10.26 Structure of module in TTCN-3

10.27 Definitions of two subtypes

10.28 Parameterized template for constructing message to be sent

10.29 Parameterized template for constructing message to be received

10.30 Testing (a) square-root function (SRF) calculator and (b) port between tester and SRF calculator

10.31 Defining port type

10.32 Associating port with component

10.33 Test case for testing SRF calculator

10.34 Executing test case

10.35 Comparison of state transitions of FSM and EFSM

10.36 Controlled access to a door

10.37 SDL/GR door control system

10.38 Door control behavior specification

10.39 Door control behavior specification

10.40 Transition tour from door control system of Figures 10.38 and 10.39

10.41 Testing door control system

10.42 Output and input behavior obtained from transition tour of Figure 10.40

10.43 Test behavior obtained by refining if part in Figure 10.42

10.44 Test behavior that can receive unexpected events (derived from Figure 10.43)

10.45 Core behavior of test case for testing door control system (derived from Figure 10.44)

10.46 User interface of ATM

10.47 Binding of buttons with user options

10.48 Binding of buttons with cash amount

10.49 FSM G

10.50 FSM H

10.51 FSM K

10.52 Nondeterministic FSM

11.1 State transition diagram of requirement

11.2 Test suite structure

11.3 Service interworking between FR and ATM services

11.4 Transformation of FR to ATM cell

11.5 FrAtm test suite structure

11.6 State transition diagram of a test case

11.7 State transition diagram of test case result

12.1 Concept of cycle-based test execution strategy

12.2 Gantt chart for FR–ATM service interworking test project

12.3 Broad criteria of test automation tool evaluation

12.4 Test selection guideline for automation

12.5 Characteristics of automated...