A Practical Introduction to PSL (eBook)

This book describes the Property Specification Language PSL, recently standardized as IEEE Standard 1850-2005. PSL was developed to fulfill the following requirements: easy to learn, write, and read; concise syntax; rigorously well-defined formal semantics; expressive power, permitting the specification for a large class of real world design properties; known efficient underlying algorithms in simulation, as well as formal verification. Basic features are covered, as well as advanced topics such as the use of PSL in multiply-clocked designs. A full chapter is devoted to common errors, gathered through the authors' many years of experience in using and teaching the language.

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Functional veri?cation is hard. Period. No disagreement here. But why is this so? Consider today's design ?ow: much of it is more or less automated, from RTL to netlist to layout to silicon. But all this automation depends upon having correct RTL input to start with, and there is little or no automation to help with RTL creation. It is hard enough for a designer to decide what RTL model he wants to build, and then to describe that RTL model correctly in a hardware description language. It is even more di?cult for a veri?cation engineer, who can't read the designer's mind, to verify that what the designer created not only represents the RTL model he had conceived, but also that the RTL model is an appropriate one for the problem at hand. What makes RTL modeling and veri?cation di?cult is concurrency. It is easy to teach an engineer how to write procedural code that conforms to the synthesizable subset of a hardware description language. What is hard is understanding how the engineer's procedural code interacts with other c- ponents in the design over time. In fact, until recently we lacked e?ective languages to describe concurrent behaviors. The IEEE 1850 Property Speci?cation Language (PSL) is a language for the formal speci?cation of concurrent systems. The language is particularly applicable for writing assertions about hardware designs. PSL supports m- tiple veri?cation paradigms - including formal analysis, simulation, and acc- eration/emulation.