Embedded Software Design and Programming of Multiprocessor System-on-Chip (eBook)

Acknowledgments 6
Contents 8
List of Figures 12
List of Tables 16
1 Embedded Systems Design: Hardware and Software Interaction 17
1.1 Introduction 17
1.2 From Simple Compiler to Software Design for MPSoC 23
1.3 MPSoC Programming Steps 29
1.4 Hardware/Software Abstraction Levels 32
1.4.1 The Concept of Hardware/Software Interface 34
1.4.2 Software Execution Models with Abstract Hardware/Software Interfaces 36
1.5 The Concept of Mixed Architecture/Application Model 40
1.5.1 Definition of the Mixed Architecture/Application Model 40
1.5.2 Execution Model for Mixed Architecture/Application Model 41
1.5.2.1 Execution Model Described in Simulink 41
1.5.2.2 Execution Model Described in SystemC 44
1.6 Examples of Heterogeneous MPSoC Architectures 47
1.6.1 1AX with AMBA Bus 47
1.6.2 Diopsis RDT with AMBA Bus 49
1.6.3 Diopsis R2DT with NoC 52
1.7 Examples of Multimedia Applications 55
1.7.1 Token Ring Functional Specification 56
1.7.2 Motion JPEG Decoder Functional Specification 57
1.7.3 H.264 Encoder Functional Specification 59
1.8 Conclusions 63
2 Basics 65
2.1 The MPSoC Architecture 65
2.2 Programming Models for MPSoC 67
2.2.1 Programming Models Used in Software 70
2.2.2 Programming Models for SoC Design 71
2.2.3 Defining a Programming Model for SoC 72
2.2.4 Existing Programming Models 74
2.2.4.1 Message-Passing Interface (MPI) 74
2.2.4.2 Multi-core Communications API (MCAPI) 75
2.2.4.3 Y-Chart Application Programmer's Interface (YAPI) 76
2.2.4.4 Task Transaction Level (TTL) 76
2.2.4.5 Distributed System Object Component (DSOC) 76
2.2.4.6 Compute Unified Device Architecture (CUDA) 77
2.2.4.7 Open Computing Language (OpenCL) 78
2.2.4.8 Open Multi-processing (OpenMP) 79
2.2.4.9 Transaction-Level Modeling (TLM) 80
2.2.4.10 Other Examples of Programming Models 80
2.3 Software Stack for MPSoC 81
2.3.1 Definition of the Software Stack 81
2.3.2 Software Stack Organization 82
2.3.2.1 Application Layer 82
2.3.2.2 HdS Layer 83
2.4 Hardware Components 85
2.4.1 Computing Unit 85
2.4.1.1 General-Purpose Processor 89
2.4.1.2 Application-Specific Instruction Set Processor 89
2.4.1.3 Digital Signal Processor 91
2.4.1.4 Microcontroller 92
2.4.2 Memory 93
2.4.3 Interconnect 96
2.5 Software Layers 100
2.5.1 Hardware Abstraction Layer 102
2.5.2 Operating System 103
2.5.3 Communication and Middleware 108
2.5.4 Legacy Software and Programming Models 108
2.6 Conclusions 108
3 System Architecture Design 109
3.1 Introduction 109
3.1.1 Mapping Application on Architecture 109
3.1.1.1 The Mapping 109
3.1.1.2 The Design Space Exploration 112
3.1.2 Definition of the System Architecture 113
3.1.3 Global Organization of the System Architecture 114
3.2 Basic Components of the System Architecture Model 117
3.2.1 Functions 117
3.2.2 Communication 118
3.3 Modeling System Architecture in Simulink 118
3.3.1 Writing Style, Design Rules, and Constraints in Simulink 118
3.3.1.1 Constraints on the Simulink Standard Blocks 118
3.3.1.2 Constraints on the S-Functions 119
3.3.1.3 Constraints on the Communication 120
3.3.2 Software at System Architecture Level 120
3.3.3 Hardware at System Architecture Level 121
3.3.4 Hardware--Software Interface at System Architecture Level 122
3.4 Execution Model of the System Architecture 122
3.5 Design Space Exploration of System Architecture 122
3.5.1 Goal of Performance Evaluation 122
3.5.2 Architecture/Application Parameters 123
3.5.3 Performance Measurements 125
3.5.4 Design Space Exploration 126
3.6 Application Examples at the System Architecture Level 127
3.6.1 Motion JPEG Application on Diopsis RDT 127
3.6.2 H.264 Application on Diopsis R2DT 130
3.7 State of the Art and Research Perspectives 134
3.7.1 State of the Art 134
3.7.2 Research Perspectives 135
3.8 Conclusions 136
4 Virtual Architecture Design 138
4.1 Introduction 138
4.1.1 Definition of the Virtual Architecture 138
4.1.2 Global Organization of the Virtual Architecture 139
4.2 Basic Components of the Virtual Architecture Model 140
4.2.1 Software Components 141
4.2.2 Hardware Components 141
4.3 Modeling Virtual Architecture in SystemC 142
4.3.1 Software at Virtual Architecture Level 142
4.3.2 Hardware at Virtual Architecture Level 145
4.3.3 Hardware--Software Interface at Virtual Architecture Level 149
4.4 Execution Model of the Virtual Architecture 149
4.5 Design Space Exploration of Virtual Architecture 151
4.5.1 Goal of Performance Evaluation 151
4.5.2 Architecture/Application Parameters 151
4.5.3 Performance Measurements 152
4.5.4 Design Space Exploration 154
4.6 Application Examples at the Virtual Architecture Level 154
4.6.1 Motion JPEG Application on Diopsis RDT 154
4.6.2 H.264 Application on Diopsis R2DT 158
4.7 State of the Art and Research Perspectives 162
4.7.1 State of the Art 162
4.7.2 Research Perspectives 163
4.8 Conclusions 164
5 Transaction-Accurate Architecture Design 166
5.1 Introduction 166
5.1.1 Definition of the Transaction-Accurate Architecture 167
5.1.2 Global Organization of the Transaction-Accurate Architecture 167
5.2 Basic Components of the Transaction-Accurate Architecture Model 169
5.2.1 Software Components 170
5.2.2 Hardware Components 170
5.3 Modeling Transaction-Accurate Architecture in SystemC 171
5.3.1 Software at Transaction-Accurate Architecture Level 171
5.3.2 Hardware at Transaction-Accurate Architecture Level 176
5.3.3 Hardware--Software Interface at Transaction-Accurate Architecture Level 179
5.4 Execution Model of the Transaction-Accurate Architecture 179
5.5 Design Space Exploration of Transaction-Accurate Architecture 181
5.5.1 Goal of Performance Evaluation 181
5.5.2 Architecture/Application Parameters 182
5.5.3 Performance Measurements 182
5.5.4 Design Space Exploration 183
5.6 Application Examples at the Transaction-Accurate Architecture Level 184
5.6.1 Motion JPEG Application on Diopsis RDT 184
5.6.2 H.264 Application on Diopsis R2DT 187
5.7 State of the Art and Research Perspectives 195
5.7.1 State of the Art 195
5.7.2 Research Perspectives 196
5.8 Conclusions 197
6 Virtual Prototype Design 198
6.1 Introduction 198
6.1.1 Definition of the Virtual Prototype 198
6.1.2 Global Organization of the Virtual Prototype 200
6.2 Basic Components of the Virtual Prototype Model 200
6.2.1 Software Components 200
6.2.2 Hardware Components 201
6.3 Modeling Virtual Prototype in SystemC 202
6.3.1 Software at Virtual Prototype Level 202
6.3.1.1 Loading Software Image in Memory 206
6.3.2 Hardware at Virtual Prototype Level 209
6.3.3 Hardware--Software Interface at Virtual Prototype Level 209
6.4 Execution Model of the Virtual Prototype 210
6.5 Design Space Exploration of Virtual Prototype 211
6.5.1 Goal of Performance Evaluation 211
6.5.2 Architecture/Application Parameters 212
6.5.3 Performance Measurements 212
6.5.4 Design Space Exploration 213
6.6 Application Examples at the Virtual Prototype Level 214
6.6.1 Motion JPEG Application on Diopsis RDT 214
6.6.2 H.264 Application on Diopsis R2DT 217
6.7 State of the Art and Research Perspectives 219
6.7.1 State of the Art 219
6.7.2 Research Perspectives 220
6.8 Conclusions 221
7 Conclusions and Future Perspectives 222
7.1 Conclusions 222
7.2 Future Perspectives 224
Glossary 226
References 234
Index 242