Logic Synthesis for FSM-Based Control Units (eBook)

Acknowledgements 5
Contents 6
Symbols 8
Abbreviations 11
Introduction 13
1 Hardwired Interpretation of Control Algorithms 18
1.1 Principle of Microprogram Control 18
1.2 Control Algorithm Interpretation with Finite State Machines 21
1.3 Control Algorithm Interpretation with Microprogram Control Units 27
1.4 Organization of Compositional Microprogram Control Units 39
References 42
2 Matrix Realization of Control Units 46
2.1 Primitive Matrix Realization of FSM 46
2.2 Optimization of Mealy FSM Matrix Realization 52
2.3 Optimization of Moore FSM Logic Circuit 59
References 69
3 Evolution of Programmable Logic 70
3.1 Simple Field-Programmable Logic Devices 70
3.2 Programmable Logic Devices Based on Macrocells 77
3.3 Programmable Devices Based on LUT Elements 81
3.4 Design of Control Units with FPLD 84
References 88
4 Optimization for Logic Circuit of Mealy FSM 93
4.1 Synthesis of FSM with Replacement of Logical Conditions 93
4.2 Synthesis of FSM with Encoding of Collections of Microoperations 102
4.3 Synthesis of FSM with Encoding of Rows of Structure Table 108
4.4 Synthesis of FSM Multilevel Logic Circuits 111
References 118
5 Optimization for Logic Circuit of Moore FSM 119
5.1 Optimization for Two-Level FSM Model 119
5.2 FSM Synthesis for CPLD with Embedded Memory Blocks 128
5.3 Synthesis of Moore FSM with Logical Condition Replacement 136
References 142
6 FSM Synthesis with Transformation of GSA 144
6.1 Optimization of Logical Condition Replacement Block 144
6.2 Optimization for Block for Decoding of Microoperations 153
6.3 Synthesis of Multilevel FSM Models 160
References 168
7 FSM Synthesis with Object Code Transformation 170
7.1 Principle of Object Code Transformation 170
7.2 Logic Synthesis for Mealy FSM with Object Code Transformation 172
7.3 Logic Synthesis for Moore FSM with Object Code Transformation 183
7.4 Multilevel Models of FSM with Object Code Transformation 196
References 205
8 FSM Synthesis with Elementary Chains 207
8.1 Basic Models of FSM with Elementary Chains 207
8.2 Optimization of Block of Input Memory Functions 215
8.3 Optimization of Block of Microoperations 222
8.4 Synthesis for Multilevel Models of FSM with Elementary Chains 232
References 241
9 Conclusion 242
Index 243