The SPARC Technical Papers

Section I The SPARC Architecture.- 1 The Scalable Processor Architecture (SPARC).- 2 The Scalable Processor Architecture (SPARC).- 3 A RISC Tutorial.- 4 Why RISC Has Won.- 5 SPARC: A Total Solution for RISC.- 6 The Role of RISC in Advanced Computer Design.- Section II SPARC Implementations.- 7 First 32-Bit SPARC-Based Processors Implemented in High-Speed CMOS.- 8 SPARC: An ASIC Solution for High-Performance Microprocessors.- 9 SPARC Implementations: ASIC vs. Custom Design.- 10 Sunrise: A High-Performance 32-Bit Microprocessor.- 11 CMOS Custom Implementation of the SPARC Architecture.- 12 CMOS Gate-Array Implementation of the SPARC Architecture.- 13 Implementing SPARC: A High-Performance 32-Bit RISC Microprocessor.- 14 Design Considerations for a Bipolar Implementation of SPARC.- 15 Bipolar ECL Implementation of SPARC.- 16 Implementing SPARC in ECL.- 17 SPARC: An Open RISC Architecture.- Section III SPARC Development Tools.- 18 Optimizing Compilers for the SPARC Architecture.- 19 Development Tools for RISC: An Array of Tools for SPARC Designs.- 20 Sun’s SPARC Embedded Development Tools.- 21 Software Considerations for Real-Time RISC.- SPARC for Real-Time Applications.- Section IV System Software.- 23 SunOS on SPARC.- 24 SunOS Multi-Thread Architecture.- 25 Understanding the Application Binary Interface.- 26 SPARC Compliance Definition.- Section V System Configuration.- 27 Concept to System: How Sun Microsystems Created SPARCstationl Using LSI Logic’s ASIC System Technology.- 28 SBus Takes I/O Performance Into the’ 90s.- 29 SPARC MBus Overview.- 30 Understanding MBus.- Section VI SPARC Strategy.- 31 Licensing Strategy at Sun Microsystems.- Section VII SPARC Competitive Analysis.- 32 An Analysis of MIPS and SPARC Instruction Set Utilization on the SPEC Benchmarks.