Second International Conference on Networks and Advances in Computational Technologies

Maurizio Palesi is currently Associate Professor in Computer Engineering, Department of Electrical, Electronics and Computer Engineering, Università degli Studi di Catania, Catania, Italy. Prior to this he worked as Associate Professor in Computer Engineering, Università degli Studi di Enna, KORE, Italy. He completed his PhD Degree in Computer Engineering, Università degli Studi di Catania, Italy and Diploma di Laurea (five years degree) in Computer Engineering, (grade 110/110 e lode), Università degli Studi di Catania, Italy. He has supervised more than 50 students for the Master Degree in Computer Engineering. He is external co-supervisor for Ph.D. in Electrical Engineering of students from School of Graduate Studies, Universiti Teknologi Malaysia. He is part of foreign evaluator panel of the PhD program in Computer Engineering and Electrical Engineering at the Department of Electrical Engineering, COMSATS Institute of Information Technology (CIIT), Islamabad, Pakistan. He has also been member of the commission for the international PhD exam of students. In 2011 he received the Best Paper Award for his paper "Run-time Deadlock Detection in Networks-on-Chip using Coupled Transitive Closure Networks" presented at the Design Automation and Test in Europe (DATE 2011) on 14-18 March 2011, at Grenoble, France. In 2014 he received HiPEAC Paper Award for his paper "System-Level Hierarchy in Run-Time Fault-Aware Management of Many-Core Systems" presented at Design Automation Conference (DAC). He also received the Outstanding Reviewer award to be within the top 10th percentile of reviewers for the Elsevier Computers & Electrical Engineering Journal, in terms of the number of manuscript reviews completed in the last two years in 2014. He is presently Member of the European Network on High Performance and Embedded Architecture and Compilation (HiPEAC) and also IEEE Senior Member which is an honor bestowed only to those who have made significant contributions to the profession. He is also a co-editor in various reputed International journals. He has also published numerous papers in national and international journals.

Introduction.- Part I: Networking.- Network Performance Analysis.- Parallel & Distributed Networks.- IoT Architectures & Protocol.- Wireless Sensor Networks.- Vehicular Ad-hoc Networks.- Mobile Ad-hoc Networks.- Delay Tolerant Networks.- Fault Tolerant Networks.- Opportunistic Networks.- Cognitive Radio Networks.- Satellite Communication.- Cryptography & Data Security.- Cyber-Physical Systems.- Cloud & Fog Computing.- Grid & Cluster Computing.- Part II: Advanced Computing.- AI & Machine Learning.- Data Mining & Warehousing.- Web Mining.- Computational Intelligence.- Big Data Analytics.- Embedded Computing.- Ubiquitous Computing.- High Performance Computing.- Image & Pattern Recognition.- Natural Language Processing.- Human Computer Interaction.- Speech & Signal Processing.- Bio-medical Informatics.- Virtual & E-Learning.- Semantic Web Technologies.- Conclusion.