Architecture-Independent Loop Parallelisation - Radu C. Calinescu

Architecture-Independent Loop Parallelisation

Buch | Hardcover
190 Seiten
2000 | Edition. ed.
Springer London Ltd (Verlag)
978-1-85233-284-6 (ISBN)
85,55 inkl. MwSt
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This title looks at architecture-independent programming and automatic parallelization. Building on advances in both areas, the title proposes a unified approach to parallelization of scientific computing code. It is intended for researchers and post graduate students.
Architecture-independent programming and automatic parallelisation have long been regarded as two different means of alleviating the prohibitive costs of parallel software development. Building on recent advances in both areas, Architecture-Independent Loop Parallelisation proposes a unified approach to the parallelisation of scientific computing code. This novel approach is based on the bulk-synchronous parallel model of computation, and succeeds in automatically generating parallel code that is architecture-independent, scalable, and of analytically predictable performance.

INTRODUCTION: Motivation. Parallelisation approach proposed in the book. Organisation of the book.- THE BULK-SYNCHRONOUS PARALLEL MODEL: Introduction. Bulk-synchronous parallel computers. The BSP programming model. The BSP cost model. Assessing the efficiency of BSP code. The development of BSP applications. BSP pseudocode.- DATA DEPENDENCE ANALYSIS AND CODE TRANSFORMATION: Introduction. Data dependence. Code transformation techniques.- COMMUNICATION OVERHEADS IN LOOP NEST SCHEDULING: Introduction. Related work. Communication overheads due to input data. Inter-tile communication overheads. Summary.- TEMPLATE-MATCHING PARALLELISATION: Introduction. Related work. Communication-free scheduling. Wavefront block scheduling. Iterative scheduling. Reduction scheduling. Recurrence scheduling. Scheduling broadcast loop nests. Summary.- GENERIC LOOP NEST PARALLELISATION: Introduction. Related work. Data dependence analysis. Potential parallelism identification. Data and computation partitioning. Communication and synchronisation generation. Performance analysis. Summary.- A STRATEGY AND A TOOL FOR ARCHITECTURE-INDEPENDENT LOOP PARALLELISATION: Introduction. Related work. A two-phase strategy for loop nest parallelisation. BSPscheduler: an architecture-independent loop paralleliser. Summary.- THE EFFECTIVENESS OF ARCHITECTURE-INDEPENDENT LOOP PARALLELISATION: Introduction. Matrix-vector and matrix-matrix multiplication. LU decomposition. Algebraic path problem. Finite difference iteration on a Cartesian grid. Merging. Summary.- CONCLUSIONS: Summary of contributions and concluding remarks. Future work directions.- A: THEOREM PROOFS.- B: SYNTAX OF THE BSPSCHEDULER INPUT LANGUAGE.- C: SYNTAX OF THE BSPSCHEDULER OUTPUT LANGUAGE.- D: AUTOMATICALLY GENERATED CODE FOR EXAMPLE 7.5.- Bibliography.- Index.

Erscheint lt. Verlag 14.6.2000
Reihe/Serie Distinguished Dissertations
Zusatzinfo biography
Verlagsort England
Sprache englisch
Gewicht 440 g
Einbandart gebunden
Themenwelt Mathematik / Informatik Informatik Betriebssysteme / Server
Mathematik / Informatik Informatik Theorie / Studium
ISBN-10 1-85233-284-0 / 1852332840
ISBN-13 978-1-85233-284-6 / 9781852332846
Zustand Neuware
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